Radar circuits often use a phase-locked loop (PLL) to generate a ramp modulated signal. In the case of a PLL with a charge pump, the charge pump is used to drive a control port of a voltage controlled oscillator (VCO).
In radar applications, phase noise is a key parameter for the system. VCOs capable of supporting long range radar (LRR) and short range radar (SRR) applications require a large tuning voltage range, for example from 0.4V to 5V. The ability of the charge pump to drive the control port of the VCO at low voltages is a limiting factor in relation to the phase noise performance of the PLL.
FIG. 1 illustrates a simplified circuit diagram of a charge pump circuit 100. The charge pump circuit consists of a bipolar transistor 110. The collector terminal of the bipolar transistor 110 is coupled to a trickle current source 120 and to an output node 105 of the charge pump circuit 100. The emitter terminal of the bipolar transistor 110 is coupled to a pulsed current source 130. A control signal 115 is provided to the base terminal of the bipolar transistor 110.
The minimum achievable voltage Vout at the output node 105 of the charge pump circuit 100 is fixed by the minimum voltage Ve at the emitter terminal of the bipolar transistor 110 and the minimum voltage Vice across the bipolar transistor 110. The voltage Ve at the emitter terminal of the bipolar transistor 110 is determined by the voltage Vb at the base terminal of the bipolar transistor 110; i.e. by the control signal 115. That is, the lower the voltage Vb at the base terminal of the bipolar transistor 110 (i.e. the voltage Vail of the control signal 115) the lower the voltage Ve at the emitter terminal of the bipolar transistor 110 and thus the lower the achievable minimum voltage Vout at the output node 105 of the charge pump circuit 100 while keeping acceptable phase noise performance at the PLL output.
However, too low a voltage level of the output node 105 will cause the bipolar transistor 110 to enter into its saturation region of operation, which results in baseband noise degradation of the charge pump circuit 100 and thus phase noise degradation at the PLL output. Accordingly, the minimum voltage level Vctrl_min of the control signal 115 should be limited to avoid saturating the bipolar transistor 110.
Accordingly, there is a conflict between the need to achieve a low minimum voltage Vout at the output node 105 and the need to avoid the bipolar transistor 110 being driven into its saturation mode of operation. The ability to achieve a minimum voltage Vout at the output node 105 of the charge pump circuit 100 without driving the bipolar transistor 110 into its saturation mode of operation is further complicated by the affect that variations in temperature can have on the bipolar transistor 110. Indeed, the base-emitter voltage of the bipolar transistor 100 is inversely proportional to the absolute temperature.